Minimizing transistor size in order to keep up with Moore's law continually requires reducing first level interconnect (FLI) pitch and bump size. In addition, using advanced dielectrics has often resulted in utilizing low-k and extremely low-k materials in silicon.
The combination of these factors results in higher sensitivity to stress during assembly and thermo-mechanical stress. Therefore, with each new technological advancement, solutions for reducing thermo-mechanical stress become significantly more important.
During a capillary underfill assembly process, designers need to incorporate a keep-out-zone (KOZ) for epoxy in order to allow the epoxy to be placed against at least one side of the die (possibly more than one side for larger dies). The need to incorporate a KOZ typically adds to the overall form factor of the electronic package.
One of the previous solutions to reduce thermo-mechanical stress is to use a capillary underfill (CUF) process. A typical CUF process forms a fillet around a die edge to aid in stress reduction. In order to achieve a tighter KOZ, additional steps (e.g., physical or chemical barriers) are usually required.
Another conventional solution uses a molded underfill (MUF) process. MUF processes are commonly used to provide stress reduction and warpage control for thin packages.
Stress-related failures are typically more critical (and prevalent) in large die packages. As examples, server and flip chip ball grid array (FCBGA) packages are usually more costly. In addition, FCBGA packages are commonly used in applications under extreme conditions (e.g., military applications) where reliability failures have to be extremely low.
Large electronic packages are also commonly subject to other types of failures. As examples, inter-layer dielectric delamination commonly occurs in larger packages. In addition, fillet cracks and solder resist cracks commonly occur in larger packages.
Thermo-mechanical modeling has shown that fillet geometry plays a big role in stress reduction. FIG. 1 shows the maximum UF and SR stress on a typical processor. FIG. 1 illustrates that a high fillet provides 50% less stress than a lower fillet.
Current CUF processes can typically only control the CUSP. The CUSP is usually dependent on the amount of epoxy. When more epoxy is used a larger fillet is created for a fixed size KOZ. One of drawbacks with current CUF processes is that they are usually unable to provide tailored fillet geometries.